#ifndef __Orion_System_h
#define __Orion_System_h
#include "MR88FX02.h"
/*********************Define CLK Source*****************************/
#define  BEEP1CKSEL_APBCLK	0							//BEEP1 
#define  BEEP1CKSEL_SYSCLK	1
#define  BEEP1CKSEL_XTAL1		2
#define  BEEP1CKSEL_LSRC		3

#define  LEDCKSEL_APBCLK	0								//LED
#define  LEDCKSEL_SYSCLK	1
#define  LEDCKSEL_XTAL1		2
#define  LEDCKSEL_LSRC		3


#define  ADCCKSEL_APBCLK	0								//ADC
#define  ADCCKSEL_SYSCLK	1
#define  ADCCKSEL_XTAL1		2
#define  ADCCKSEL_LSRC		3

#define  LCDCKSEL_APBCLKD256	0						//LCD
#define  LCDCKSEL_SYSCLKD256	1
#define  LCDCKSEL_XTAL1				2
#define  LCDCKSEL_LSRC				3

#define  EXTICKSEL_HCLK				0									//EXTI
#define  EXTICKSEL_LSRC				1

#define  I2C0CKSEL_APBCLK			0							//I2C0
#define  I2C0CKSEL_HSRC				1

#define  WTCKSEL_APBCLKD256		0						//WTIM
#define  WTCKSEL_SYSCLKD256		1
#define  WTCKSEL_XTAL1				2
#define  WTCKSEL_LSRC					3

#define  BEEP0CKSEL_APBCLK			0					//BEEP0
#define  BEEP0CKSEL_SYSCLK			1
#define  BEEP0CKSEL_XTAL1				2
#define  BEEP0CKSEL_LSRC				3

#define  UART2CKSEL_APBCLK			0					//UART2
#define  UART2CKSEL_SYSCLK			1
#define  UART2CKSEL_XTAL1				2
#define  UART2CKSEL_HSRC				3

#define  UART1CKSEL_APBCLK			0					//UART1
#define  UART1CKSEL_SYSCLK			1
#define  UART1CKSEL_XTAL1				2
#define  UART1CKSEL_HSRC				3

#define  UART0CKSEL_APBCLK			0					//UART0
#define  UART0CKSEL_SYSCLK			1
#define  UART0CKSEL_XTAL1				2
#define  UART0CKSEL_HSRC				3

/****************************************enum define********************************************/
typedef enum{
	InnerHSRC=0,		//Default inner hsrc
	ExterHXTAL1,		//extern high xtal1
	InnerLSCLK,				//extern or inner lsrc
	ExterHXTAL2,		//extern high xtal2
	ExterLSCLK,				//extern or inner lsrc	
}enum_MainClkSrc;

typedef enum{
	APB_DIVIDER_NONE=0,
	APB_DIVIDER_2=4,
	APB_DIVIDER_4=5,
	APB_DIVIDER_8=6,
	APB_DIVIDER_16=7
}enum_APBdiv;
/****************************************struct define********************************************/
typedef enum{
	set_beep1=0,
	set_led,
	set_adc,
	set_lcd,
	set_exti,
	set_i2c0,
	set_wtim,
	set_beep0,
	set_uart2,
	set_uart1,
	set_uart0,
	set_flash,
	set_sys,
	set_pmu,
	set_io,
	set_spi0,
	set_timer2,
	set_timer1,
	set_timer0,
	set_anactr,
	set_iwdg,
	set_crc,
	set_rambist,
}enum_Device_Name;


typedef enum{
	disable=0,
	enable=1
}FunctionalState;

typedef enum{
	Reset=0,
	Set,
} BitStatue;
/******************************************function define******************************************/
/*
	@ ahbpres default=5,range[0:0xff] AHBCLK = SYSCLK/(AHBPRES+1)
*/
void RCC_Configuration(enum_MainClkSrc clksrc, uint8_t ahbpres,enum_APBdiv apb_div);
void Device_CLK_Select(enum_Device_Name devname,uint8_t fsrc);
void Device_CLK_Enable(enum_Device_Name devname,FunctionalState enable);
void RCC_TRIM(void);
#endif
